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At the moment, component updating works in a way that all components receive an update signal in order of their creation. This leads to inconsistencies in cases like the following:
The circuit contains two flip-flops and a clock, the clock has been placed after the first flip-flop and before the second one
When stepping trough the simulation, the second flip-flop is updated one tick earlier because it receives a HIGH signal from the clock; when the first flip-flop is updated, it uses the clock's old state.
Wanted behavior:
All components with no precessor are updated (go trough all components once to find them / use existing signal)
Components send update signal to their successors
Successors update, if all their precessors have updated
This should inductively update all components without too much processing overhead. Labeled as bug because it leads to unexpected behaviour.
The text was updated successfully, but these errors were encountered:
At the moment, component updating works in a way that all components receive an update signal in order of their creation. This leads to inconsistencies in cases like the following:
Wanted behavior:
This should inductively update all components without too much processing overhead. Labeled as bug because it leads to unexpected behaviour.
The text was updated successfully, but these errors were encountered: