Make code verilator compatible

[harbaum]

There are some places in Minimig code where continuous assignments are being used for registers. It seems this doesn't make any difference for synthesis. But when simulating in verilator, the results will not run as those assignments don't match the timing of other ones.

See e.g. these patches:
harbaum/NanoMig@22979a9
and
harbaum/NanoMig@0df4bd0

These patches make the code run in verilator but don't break synthesis ... at least not for gowin FPGAs

In beamcounter parts of an array are used within a register while bit0 uses a continuous assignment. Verilator doesn't like that. The following patch ads a variant that verilator likes:

harbaum/NanoMig@d8d1b9d

As a result the code can be run in verilator making things like this possible:

https://github.com/harbaum/NanoMig/tree/main/sim